SOT-MRAM

SOT-MRAM (spin-orbit torque MRAM) has the potential to challenge STT-MRAM, as it is a faster, denser and much more efficient memory technology.

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SOT-MRAM vs STT-MRAM bitcell

SOT-MRAM devices feature switching of the free magnetic layer done by injecting an in-plane current in an adjacent SOT layer, unlike STT-MRAM where the current is injected perpendicularly into the magnetic tunnel junction and the read and write operation is performed through the same path.

In June 2018, researchers from Imec fabricated SOT-MRAM devices on 300mm wafers using CMOS compatible processes, for the first time.

The latest SOT-MRAM news

Hprobe launches a next-generation MRAM wafer sort magnetic test head

Hprobe announced a new magnetic test head for MRAM Wafer Sort. The new module, the H3DM-XL, is at the heart of the latest addition to Hprobe’s IBEX line, the IBEX-WS.

Hprobe MRAM Wafer-Sort Magnetic Test Head (IBEX-WS)

The IBEX-WS test equipment integrates 3D magnetic field capabilities, while increasing field area and uniformity for wafer probing large MRAM arrays. It also features a unique patented robotized 3D Field Calibration Unit (FCU) for high-speed field mapping and monitoring.

Read the full story Posted: Dec 01,2021

Hprobe teams up with IMEC to develop SOT-MRAM testing tools

Hprobe, a developer of testing equipment for magnetic devices, announced that it has teamed up with the IMEC research institute to jointly extend Hprobe's fast testing protocols for SOT-MRAM devices.

Hprobe wafer prober system photo

Hprobe has already begun to optimize its test flow for SOT-MRAM devices in order to bring the characterization and testing to an industrial level with the primary objective to reduce the testing time while maximizing yield.

Read the full story Posted: Apr 04,2019

Imec researchers deposited SOT-MRAM devices on 300 mm wafers

Researchers from Imec fabricated spin-orbit torque MRAM (SOT-MRAM) devices on 300mm wafers using CMOS compatible processes. The researchers say that these devices offer unlimited endurance, fast switching speeds and low power consumption.

Imec says that SOT-MRAM can overcome the limitation of spin-transfer torque in MRAM memories, but up until now it was only demonstrated in a lab. The core of the SOT-MRAM is a magnetic tunnel junction in which a thin dielectric layer is sandwiched between a magnetic fixed layer and a magnetic free layer. SOT-MRAM devices feature switching of the free magnetic layer done by injecting an in-plane current in an adjacent SOT layer, unlike STT-MRAM where the current is injected perpendicularly into the magnetic tunnel junction and the read and write operation is performed through the same path.

Read the full story Posted: Jun 19,2018

ISI introduces a new 3-Axis magnet option for its MRAM tester systems, targeting STT-MRAM and SOT-MRAM testing

Integral Solutions International (ISI) announced a new 3-Axis Magnet Option for wafer-level testing. Combined with ISI's WLA5000 Tester, the 3D magnetic fields produced by this system can be used for characterization of MRAM devices in addition to 2D/3D Magnetic Sensors.

ISI WLA5000 MRAM tester

ISI says that for MRAM applications, the 3D Magnetic fields produced by ISI’s 3-Axis Magnet Option delivers solutions for both STT-MRAM and SOT-MRAM applications.

Read the full story Posted: Mar 04,2022

ISI ships its first SOT-MRAM tester system

Integral Solutions International (ISI) announced its first shipment of a commercial SOT-MRAM tester system. This new equipment was developed by integrating a commercial pulser with ISI’s proprietary bias-tee and measurement electronics.

ISI says that the new tester system generates pulses as narrow as 300pS, suitable for R&D applications which require extremely narrow pulse widths. In parallel, ISI is also developing its proprietary Gen-4 Pulser System, which will provide high-throughput and cost-effective measurement solutions with the flexibility of testing either STT-MRAM or SOT-MRAM devices. The Gen-4 system is expected to be released in the fall of 2021.

Read the full story Posted: Apr 22,2021

ITRI and UCLA to co-develop VC-MRAM technologies

Taiwan-based Industrial Technology Research Institute (ITRI) announced an agreement with the University of California, Los Angeles (UCLA) to co-develop Voltage-Control MRAM (VC-MRAM) technologies.

UCLA-ITRI-VC-MRAM-prototype

ITRI says that VC-MRAM is a type of SOT-MRAM that offers improved performance - 50% higher writing speed and 75% less energy consumption. VC-MRAM is said to be ideal for AIoT and automotive industry applications. The partnership is expected to strengthen the link between both parties and accelerate the R&D and industrialization of new memory technologies.

Read the full story Posted: Mar 04,2022

ITRI transfers its 200 mm SOT-MRAM technology to chipmakers in Taiwan

Digitimes reports that Taiwan's Industrial Technology Research Institute (ITRI) has been developing spin-orbit torque MRAM (SOT-MRAM) for many years, and is now transferring this technology to local chipmakers in Taiwan.

According to Digitimes , ITRI has established a platform for its SOT-MRAM technology certification and trial runs on 8-inch wafers. The report does not detail which companies are licensing ITRI's technology.

Read the full story Posted: Jul 06,2020

New material could finally enable fast, efficient and dense SOT-MRAM devices

SOT-MRAM (spin-orbit torque MRAM) has the potential to challenge STT-MRAM, as it is a faster, denser and much more efficient memory technology. Up until now, though, no suitable material that features both high electrical conductivity and a high spin hall effect was developed.

Now researchers at the Tokyo Institute of Technology have developed a new thin film material made from bismuth-antimony (BiSb) that is a topological insulator that simultaneously achieves a colossal spin Hall effect and high electrical conductivity - which means it could be used to create SOT-devices.

Read the full story Posted: Aug 03,2018

New SOT-MRAM device structure can be scaled up and is highly efficient

Researchers from Northwestern University, in collaboration with researchers from China, Italy and France, developed a new SOT-MRAM device structure that enables deterministic switching without any need for bias magnetic fields.

The new approach, unlike most earlier methods, can be scaled to large wafers with good uniformity, since it doesn't rely on having a structural asymmetry in the device. SOT-MRAM devices based on this structure could be faster and more energy-efficient than current designs.

Read the full story Posted: Aug 09,2021

NTHU researchers manage to manipulate exchange bias by spin-orbit torque

Researchers from Taiwan's National Tsing Hua University (NTHU)managed to use a spin current to manipulate the exchange bias in Spin-Orbit Torque memory (SOT-MRAM). The researchers say that this has been a long-time challenge in the field.

MRAM chip Manipulating exchange bias by spin-orbit torque (NTHU)

To achieve this, the researchers added a platinum layer under the ferromagnetic and antiferromagnetic layers of the MRAM device. The researchers patented this technique before publishing their findings.

Read the full story Posted: Mar 17,2019