Tohoku University - Page 2

Keysight Technologies announced it will launch STT-MRAM test solution products, developed in collaboration with Tohoku University and the Center for Innovative Integrated Electronic System (CIES).

Keysight says that they aim to release the test solution in early 2016. This will address "various challenges in industry".

According to Nikkei, over 20 Japanese and US companies have teamed up to develop MRAM technologies, in particular a new mass production method. Participants in this ambitious project include Tokyo Electron (who's merging with Applied Materials), Renasas, Hitachi and Shin-Etsu Chemical from Japan and Micron Technology from the US.

Japan's Tohoku University, a leader in Spintronics and MRAM research, will also join the project. The companies will finance several dozens researchers at the University. They plan to start development in February 2014, and continue to seek more companies from the US and Europe to join. The aim is to complete materials and processes development by 2017 and start mass production by 2018.

Tohoku University plans to open a new program for international academic-industrial collaboration on integrated electronics R&D in spring 2013. Tokyo Electron Limited (TEL) announced it will participate in the STT-MRAM research program, and will also develop manufacturing equipment technology for the program.

TEL has been collaborating with the university on Spintronics memory technology since December 2011, and apparently are also developing STT-MRAM STT-MRAM production equipment technology and integration technology together.

Tohoku University and Belgium's imec announced a a new collaboration in which the new twill work closely on several areas of research. Tohoku and imec already collaborate on advanced interconnects, MEMS and low-power sensor circuit readout designs, and in the future they will also jointly research MRAM, 3D integration technology, biosensors and wireless communication.

NEC Corporation and Tohoku University have developed an MRAM based CAM (content addressable memory) that includes non-volatile storage by using the vertical magnetization of vertical domain wall elements in a cobalt-nickel active layer. They call this Spin-CAM.

NEC and Tohoku built a 16-kbit Spin-CAM prototype chip (using a 90-nm process). This chip features 5 ns search cycle time, 200-microamps write current and a 6.6 square micron memory cell. Such a CAM may be used to create instant-on electronics and zero-electricity standby modes.

Hitachi and Tohoku University have developed n STT-RAM that can be written using multi-level cell (MLC) technology. They actually call their technology SPRAM (spin-transfer torque memory).

The idea is to three-dimensionally stack two TMR elements and connect them in series. This creates , four-value memory (2 bits per cell). Hitachi has already produced a prototype of this memory. The biggest advantage of the MLC SPRAM is that it can reduce bit costs in proportion to the number of stacked TMR elements, Hitachi said. For example, when two TMR elements are stacked, bit costs are reduced by about half.

A group led by Professor Hideo Ohno in the Laboratory of Nanoelectronics and Spintronics, at Tohoku University is working to develop new integrated circuits using spintronics. The ICs store data in nonvolatile memory using magnetism, so their standby power can be made zero. This memory utilizes the tunnel magneto-resistance effect.

Hitachi and the Tohoku University's Research Institute of Electrical Communication (RIEC) said they developed a new integrated circuit that integrates an arithmetic function and a nonvolatile memory function by using spintronics and Si technologies.

The IC is made by placing a MTJ (magnetic tunnel junction) MRAM device on a Si chip with a MOS transistor. The data transfer rate is faster, and the IC is small using that method.

Hitachi and a group from Japan's Tohoku University have developed a new type of memory element structure for MRAM that promises to eventually lead to gigabit-level versions of this next-generation memory technology.

For their MRAM memory element, Hitachi and the university group employed spin injection, a technology that is used for hard-drive magnetic heads and enables the structure around the element to be simplified. For the free layer where the bit is actually recorded, the element adopts the same laminated-ferri structure used in MRAM devices sold by U.S. firm Freescale Semiconductor Inc. This free layer has a double-layered composition made from cobalt-iron-boron and ruthenium.

Using these technologies, if an MRAM chip were fabricated using a 45-nanometer process, it could store the same gigabit level of data as DRAM.