According to a report from Japan, TDK Corp is going to present a prototype 8-Mbit STT-MRAM device today at Ceatec Japan 2014. The MRAM was produced on a 8" silicon substrate. Hopefully TDK will give more details on this achievement later today.
The report further says that TDK aims to commercialize STT-MRAM chips in 3-5 years.
Researchers from the A*STAR institute in Singapore suggest a new design that could make STT-MRAM devices faster. Using a computational model, the researchers tried different designs for the relative orientation of the magnetic fields in both MRAM layers (the 'field-like' term).
The strength of the 'field-like' term depends on the device geometry and the materials used. Devices with a strong field-like term has a greater potential to reduce switching times than for devices in which the field-like term is negligible.
Researchers from France's SPINTEC/CEA developed a a new multi-bit MRAM storage paradigm that may enable a large density boost for MRAM devices. The researchers achieved up to 4 bits per cell on 110-nm devices.
Multi-bit per cell relies on multiple-voltage levels that correspond to various magnetic configurations. this is readable by key features of the electrical response (extrema points).
Researchers from New Zealand's Victoria University are developing MRAM devices (MTJs) based on rare earth nitrides (RENs). RENs, grown under ulta-high vacuum are both magnetic and semiconducting.
The team is basing its work on europium nitride, which is not usually magnetic, but has been "tricked" into behaving like a magnet by being produced with slightly too few nitrogen atoms. Those RENs are grown in France's Centre for Research on Hetero-Epitaxy and Applications.
One of the problems with flash memory is that it is sensitive to defects. To solve this problem, researchers from Samsung Electronics are developing flash devices based on graphene quantum dots (GQDs). The performance of such a device is promising, with an electron density that is comparable to semiconductor and metal nanocrystal based memories. Those flash memory can also be made flexible and transparent.
The researchers used GQDs in three different sizes (6, 12, and 27 nm) between silicon dioxide layers. The memory of the QDs depend on their sizes: the 12 nm dot for example offers the highest program speed while the 27 nm dot has the highest erase speed, and is also the most stable. Samsung says that this is the first GQD demonstration in a practical device.
Toshiba developed new STT-MRAM technology that can be used to enable MRAM based cache memory for microprocessors. The L2 cache alone uses about 80% of the power consumed by the CPU, so reducing the power consumption of the cache is very important - and STT-MRAM may reduce this consumption by about 60%. It's not clear how close is this technology to actually being commercialized.
Toshiba's new STT-MRAM uses a dual-cell (2T-2MTJ) circuit in which the two MTJs have complementary resistive states (high and low resistive states). This eliminates the leak path and also increases the readout signal intensity - and so improves access speed. In Toshiba's cahce, the read time is 4.1 ns - very close to that of SRAM, while the write time (2.1ns) is similar to SRAM. Toshiba also implemented error correction mechanisms into the cache STT-MRAM chip.
Back in June 2013 Samsung Electronics launched a global research outreach program aimed towards STT-MRAM innovation. The Samsung Global MRAM Innovation (SGMI) wanted wanted to reach out to colleges, universities and research labs from all over the world to explore breakthrough and innovative STT-MRAM research.
Samsung ran a short ad campaign on MRAM-Info and Spintronics-Info to help discover partners. Samsung informed us that they received lots of best and most novel proposals on a range of compelling research subjects. They are now collaborating with 15 SGMI partners. Hopefully we'll someday hear of the advances made through these collaborations.
Crocus Technology announced that ARM licensed the company's Magnetic Logic Unit (MLU) technology. The MLU is a CMOS based rugged magnetic technology capable of offering important advantages in performance, size and security for embedded micro-controllers. MLU can replace both flash and RAM and are suitable for mobile and security applications.
Crocus will provide ARM with access to its MLU technology, including MRAM blocks in sub-90 nm technology which can replace traditional flash memory, plus MIP (Match In Place) enabled technology which enhances the security of keys and other secret data. Crocus has been co-developing the MLU technology together with IBM since 2011.
Researchers from the National University of Singapore developed a new MRAM device structure technology that may prove to be easier to implement and have high reliability compared to current MRAM structures.
The researchers explain that current MRAM uses horizontal (in-plane) current-induced magnetization. This requires ultra-thin ferromagnetic structures which are challenging to implement and also suffer from low reliability. The new design uses magnetic multilayer structures as thick as 20 nanometer, providing an alternative film structure for transmission of electronic data and storage.
Integral Solutions International (ISI) announced a new module the WLA-3000 STT-MRAM Wafer Level Analyzer, the Gen3 Pulser. The new module is optimally matched with its proprietary probecard interface to produce programmable pulses as low as 5nS, with in-situ ability to perform ultra-fast measurements on the MTJs after pulsing.
The tester can be equipped with either the single or dual-channel pulse generator modules for improved UPH. The Gen3 Pulser module was redesigned to speed up Pulse related tests by an order of magnitude and features new Error Rate test (it can measure Error Rate of 10^6 in approximately 2 seconds). It is noew possible to characterize error rate as a function of VBias, Pulse Width/Amplitude, Field and other sweep parameters.
