Technical / Research - Page 9

Integral Solutions International released a 5,000 Oe perpendicular magnet for WLA-3000, their wafer-level STT-MRAM analyzer. ISI says that this new magnet is optimally matched with its proprietary probe card interface to produce up to 5,000 Oe for the latest generation of STT-MRAM devices.

The new magnet increases maximum field while also improving z-field uniformity to +/- 0.25mm, while maintaining near zero remanence fields. It can also operate with 66% higher magnetic field duty cycle compared to the previous 3,000 Oe Perpendicular Magnet system.

Scientists at Rice University have created a solid-state memory technology based on graphene and tantalum oxide (a common insulator in electronics) that allows for high-density storage with a minimum occurrence of computer errors.

The new devices require only two electrodes per circuit, making them simpler than present-day flash memories that use three. The new design is also said to require 100 times less energy than present devices. It is a new way to make nonvolatile computer memories - memories that hold their data even when the power is off, unlike volatile random-access computer memories that lose their contents when the machine is shut down.

Researchers from France's Universite Paris-Sud and the CEA institute say that the probabilistic nature of STT-MRAM devices can be used to create synapses-like neuro system. This can be used to create efficient devices that mimic the human's brain method of operation.

MRAM cells (or MTJs) store data using electrons magnetic spin. The technology uses stochastic switching, and so to be sure that a bit is set, you have to applying a current in the MTJ for a long enough time (to increase the probability of the spin changes).

Keysight Technologies announced it will launch STT-MRAM test solution products, developed in collaboration with Tohoku University and the Center for Innovative Integrated Electronic System (CIES).

Keysight says that they aim to release the test solution in early 2016. This will address "various challenges in industry".

Toshiba presented a new STT-MRAM 1-Mb test chip that provides speed performance capable of 3.3-ns access to in-cache memory. The newly developed circuit consumes about 80% less power compared to a conventional SRAM as embedded memory - and Toshiba says that this makes it the best power-performing embedded memory.

To make this chip, Toshiba developed a new class of magnetic materials, that enabled them to build this low-power, high-efficiency, high-speed performance in energy-efficient magnetic tunnel junction (MTJ) memory.

Northwest Logic announced that its controller core has been validated with Everspin's EMD3D064M STT-MRAM chips. This interoperability is hardware proven on a Xilinx Virtex-7 FPGA platform and is now available for designs needing low-latency, high memory throughput using MRAM technology.

Everspin says that their ST-MRAM chips coupled with Northwest Logic's controller Core provides storage and memory system designers a new level of capability to have critical cache and in-flight data inherently protected.

In October 2011, Micron and Singapore's A*STAR Data Storage Institute (DSI) announced a 3-year STT-MRAM co-development project. Today they announced that they extend this collaboration for three more years.

DSI and Micro are co-developing high-density STT-MRAM devices. Micron established a technology centre in Singapore, with help from the DSI, which also provided the necessary expertise and innovation to achieve successful fabrication of STT-MRAM devices. In the next three years, the research collaboration will focus on developing low-power consumption switching mechanisms, and improving the performance of STT-MRAM devices.

Crocus Technology announced a new magnetic sensor that can be used to detect the shape and bendability of flexible displays. The company discovered a technique to turn their MRAM memory cell arrays into very sensitive magnetic sensors that have a much larger range than any commercial sensor.

The production process is very similar to the MRAM process the company uses, but with a different cell design. Basically it is a very simple sensor that detects changes in a magnetic field from a perpendicular magnet.

Crocus Technology launched a new project (called Miultismart) to develop secure multibit architecture for its Magnetic Logic Unit (MLU) technology. Crocus will collaborate with Gemalto and the French research laboratories at LIRMM and IM2NP.

A multibit architecture will enable Crocus to increase the memory density without changing the die size. As part of this project, Gemalto will develop a new operating system suitable for this MCU and LIRMM and IM2NP will test, qualify and characterize the end product - a secure microcontroller with a secure element.

A few days ago I reported that TDK will show a new STT-MRAM prototype, and now we have some more information and a couple of photos of the new test chip. TDK is showing their first STT-MRAM chip, a 8Mb device, produced on a 8" silicon substrate. 

This is the first time TDK exposed their STT-MRAM technology. Those MRAM chips were produced by TDK's Headway Technologies. TDK will not mass poroduce MRAM chips themselves but rather seek a chip-making partner to produce them. But this may take a while: TDK says it could be up to 10 years before the technology matures (earlier reports said TDK estimates that it will take 3 years to commercialize this technology).