Toshiba's new STT-MRAM based computing architecture to enable drastically faster and more efficient CPUs
Toshiba announced a new computing architecture that uses only STT-MRAM to perform both operations and storage. The idea support computing capability, register file, primary cache and secondary cache all on the same perpendicular STT-MRAM, and Toshiba says it could lead to CPUs that are drastically faster and more efficient.
Toshiba explains that in the new architecture, the results of operations (answers) that correspond to combinations of certain inputs are prepared in advance in the form of a table and stored in the memory. In response to an input, an answer is read out of the memory. This is equivalent to an operation carried out by a CPU. Because the computation answer is read once, it drastically improves processing speed and power consumption.