Technical / Research - Page 17

Grandis has been awarded a new contract from DARPA to use their spintronics and magnetic-material expertise and develop non-volatile spin logic applications: which promises non-volatile, ultra-fast, radiation-hard and radically lower power consumption.

Development work will focus on integrating magnetic tunnel junction (MTJ) materials capable of sensing very small magnetic fields with nano-magnets performing logic operations. The goal is to demonstrate non-volatile spin logic circuits operating at ultra-fast speeds of less than 1 nanosecond and ultra-low power consumption of less than 10 atto-Joules per operation. Such performance coupled with the inherent non-volatility of spin logic devices will enable not just significant reductions in the active power consumption of microprocessors but also the virtual elimination of standby power consumption.

Spin Transfer Technologies (STT) developed the first STT-MRAM device that uses STT's proprietary orthogonal spin transfer technology with a magnetic tunnel junction (MTJ) for memory state read-out. Using the MTJ element makes the device compatible with CMOS logic, and takes the orthogonal spin transfer technology a major step closer to commercialization.

The new device features deterministic switching, resulting in no incubation delays, 100% probability of switching with 500 picosecond pulses utilizing only 250 femtoJoules of energy, 100% magnetoresistance ratio, providing a highly sensitive readout of the magnetic state and bipolar switching behavior (switching upon either polarity of current pulse) potentially allowing simpler or fewer CMOS elements.

Here's a nice introduction-to-spintronics video from the Tanaka Laboratory at the University of Tokyo. They explain what is Spintronics, and how it can be applied to memory devices - including MRAM of course - and information processing with low power consumption:

Elpida Memory and Sharp announced that they will co-develop ReRAM memory, which will be commercialized in 2013. ReRAM (resistive random access memory) uses less power and can write data 10,000 faster than NAND flash. When on standby mode, it uses almost no power at all.

This collaboration will also include other Japanese companies and institutes, including the National Institute of Advanced Industrial Science and Technology and the University of Tokyo.

NVE was granted a new patent (number 7,813,165) titled “Magnetic Memory Layers Thermal Pulse Transitions,” relating to Magnetothermal MRAM.

NVE explains that Magnetothermal MRAM is an MRAM design that uses a combination of magnetic fields and ultra-fast heating from electrical current pulses to reduce the energy required to write data.

Crocus announced that they have successfully integrated their Thermally Assisted Switching (TAS)-based MRAM technology into TowerJazz’s 0.13-micron CMOS process. Crocus hopes to get samples manufactured in the "very near future", with mass production starting in 2H 2011. The first chips will probably offer 1-Mbit of storage. TowerJazz and Crocus have been working towards TAS-MRAM production since June 2009.

To achieve this milestone, a number of critical technological problems were solved, particularly in the areas of deep submicron lithography of magnetic tunnel junction (MTJ) stacks and the selection of materials for high device reliability. The newly developed technology adds only four masks to conventional CMOS manufacturing flows and is suitable for both standalone and embedded memory applications. The integration into TowerJazz’s copper-based 130nm CMOS logic process sets the stage for the market introduction of leading edge single chip memory products and embedded MRAM IP blocks to be used in complex Systems-On-Chip (SOC) for microcontroller, automotive and communications applications.

Chinese researchers have shown that magnetic memory (MRAM), logic and sensor cells can be made faster and more energy efficient by using an electric, not magnetic, field to flip the magnetization of the sensing layer only about halfway, rather than completely to the opposite direction.

The new cell requires only two layers (traditional MRAM requires three or more layers) - and so hopefully will be easier and cheaper to make. The design is a simple thin-layer sandwich of two different materials, each of which has very different magnetic and electrical properties. Applying a voltage to the ferroelectric layer switches its polarization in a way that starts to change the magnetic orientation of the adjacent ferromagnetic layer. This partial change alters the electrical resistance of the entire stack enough to indicate whether the cell is storing a "0" or a "1" data bit.

MagSil has been working on MRAM since 2004, but we had very little information about the company till now (except for a PR from 2009 in which they said they'll soon reach full-scale commercialization). Today they have finally revealed more information. They are developing MRAM based on Magnetic Recording (iMR) cell architecture, based on a traditional magnetic tunnel junction (MTJ) scheme.

The company hopes to start making a standalone 1Mb MRAM device (based on 130- and 90-nm processes) "pretty soon". They also have plans for a 64Mb chip.

The technology was originally developed by MIT and exclusively licensed to Magsil. They have filed several suits against companies over hard disk drive components using tunneling magnetoresistive (TMR) technology and have reached settlements with Western Digital, Seagate, SAW Magnetics and Headway Technologies. Litigation is still ongoing with Hitachi and Shenzen ExcelStor technology.

Scientists from Ohio University has created a new spintronics memory device from plastic. It's simply a thin strip of dark blue organic-based magnet layered with a metallic ferromagnet and connected to two electrical leads. Still, the researchers successfully recorded data on it and retrieved the data by controlling the spins of the electrons with a magnetic field. They say that the new device is a bridge between today's computers and the all-polymer, spintronic computers that the researchers hope to eventually create.

Researchers from the University of Minnesota are proposing a new composite structure for STT-RAM devices that reduces current densities by up to a factor of 50. According to the researchers, the major issue with STT-RAM is the high power inputs it requires, and the degradation of the storage elements due to the heat created from these high power inputs. The researchers hope that the new structure will pave the way for STT-RAM to become a universal memory.

The composite structure is formed by inserting one or more soft assisting layers between the recording layer and the layer with a permanent polarity. The soft assisting layers have smaller polarities than the recording layer with each assisting layer closer to the recording layer having a stronger polarity than the previous layer.