Technical / Research - Page 16

Physicists from the University of Tokyo in Japan managed to turn a semiconductor magnetic using a modest voltage (4V) - at room temperature. Up until now, you had to use very low temperature and a large voltage to achieve that. The idea is to incorporate an electrochemical cell into a field-effect transistor.

The team say that this could lead to more energy efficient MRAM chips - as you won't need to apply current when writing data.

A couple of weeks ago we reported that Crocus have successfully developed their 2nd generation MRAM products. It was rumored that Crocus will produce these chips in Russia, and today RusNano confirmed the story. The Russian state-owned investment group will invest $64 million to build an MRAM chip fab in Russia and further $55m will be invested in Crocus, which will control 51% of the joint venture (called Crocus Nano Electronics). They will begin mass producing MRAM chips in 2013.

Spingate is a US-based company focusing on perpendicular MRAM technologies. In November 2009 we have talked to Dr. Alex Shukh, Spingate's co-founder, CTO and CEO, and he explains Spingate's technology . Today Spingate sent us another update.

Spingate says that since 2009 they continued to build their IP portfolio. The company invented and has been developing a new class of nonvolatile spin logic that combines advantages of conventional CMOS logic and MRAM technologies. Spingate's spin logic represents an elegant synthesis of the conventional logic with embedded MRAM cells residing above the silicon. The memory cells have a marginal impact on layout of the logic but provides it with a non-volatility. The spin logic may offer significant performance enhancements of conventional logic devices by eliminating numerous off-chip data flows resulting in speeding up the entire system. The embedded MRAM cells employ spin induced switching mechanism and magnetic materials with either in-plane or perpendicular anisotropy. The spin logic employing perpendicular magnetic materials has better scalability and lower switching current than that based on in-plane materials. The company's logic is especially attractive for application in field programmable gate arrays (FPGAs) due to its non-volatility, simplicity, high speed and reduced chip size. Moreover it can be used for creation of nonvolatile micro-controllers and microprocessors.

Researchers from the Physikalisch-Technische Bundesanstalt (PTB) developed new technology that can make MRAM much faster - from about 400Mbit/s data rate to 2Gbit/s. According to PTB, the new tech will also reduce power consumption and thermal load and will make the MRAM chip more reliable (reduce the bit error rate). PTB has patented this technology and are looking to find an industrial partner to develop and manufacture MRAM chips.

PTB has integrated ballistic bit triggering into the MRAM cell. This basically means that their technology allows changing (writing) one MRAM cell without affecting the cells around it - which reduces error rates. Here's how they describe it: "The (magnetic) pulse ensures that the magnetization of a cell which is to be switched performs half a precision rotation (180°), while a cell whose storage state is to remain unchanged performs a complete precision rotation (360°). In both cases, the magnetization is in the state of equilibrium after the magnetic pulse has decayed, and magnetic excitations do not occur any more."

Everspin announced that BMW is using their 4Mb MRAM chip (MR2A16AMYS35) in their super bike. Everspin's say that their MRAM products meet the demands of AEC-Q100 standards that are associated with a variety of automotive applications (engine control units, advanced transmission control, in-car data log and multimedia systems for in-car entertainment).

BMW is using the memory chip in their Motorrad Motorsport engine control unit (ECU) called RSM5, storing important calibration data that controls the motorcycle during a race. The MRAM chip stores adjustable engine parameters such as data related to a racing bike’s fuel injection, ignition, braking and acceleration, and is optimized before each race - with different parameters according to the river, track and race conditions.

Researchers from the A*STAR Institute of Materials Research and Engineering and the National University of Singapore have developed an improved design for a Graphene based field-effect transistor (FET).

The new device includes an additional silicon dioxide (SiO2) dielectric gate below the graphene layer. This allows for simplified bit writing by providing an additional background source of charge carriers and paves the way towards nonvolatile Graphene-based memory.

NVE reported their financial results, and in the conference call they gave some interesting new details about their MRAM program. Daniel Baker (the CEO) says that NVE 'overcame many of the technical challenges in making MRAM'. In fact, the company is already shipped some sample prototype MRAM chips, but they don't call it 'production' yet. The samples will be for specialized niche applications - but the company sees this as a 'vehicle to develop MRAM technology'. In the future the company hopes to address large volume anti-tamper applications such as to prevent identity theft or improve the security of credit cards and smart cards.

In regards to Everspin being a licensee, here's what they say - "EverSpin is a company that's making and selling commercial MRAM, and they are spin-off of Freescale, which was a spin-off of Motorola. So, we have a long historical relationship. Motorola was an early investor in NVE, and we had research contracts and intellectual property agreements with Motorola. So, we believe that they share our vision for a very bright future for MRAM"

Global research firm VDC is presently conducting a worldwide MRAM user satisfaction research study for embedded hardware and embedded software development professionals, product managers and directors, and technology procurement specialists. VDC’s brief 16-question online survey is designed to capture confidential feedback from both early adopters of MRAM, as well as organizations that have chosen not to adopt MRAM at this time.

“VDC sees the global market for MRAM in 2011 at a critical inflection point for potential growth,” said VDC analyst Richard Dean. “With a number of well-funded start-up firms already shipping commercially to customers or expecting to begin shipping this year, MRAM adoption appears to be gaining considerable momentum. However, challenges remain, particularly as MRAM suppliers attempt to define their value propositions against competing incumbent memory technology.”

UCLA has been awarded $5.5 million from DARPA to continue develop STT-MRAM technologies. This is the second grant for this project, which brings the total DARPA grants to $10.5 million. The first stage has been completed a year early than planned - by meeting (and in fact significantly surpassing) speed, energy consumption and stability requirements of their STT-RAM (write times smaller than 5 nanoseconds and write energies lower than 0.25 picojoules per bit).

The first phase focused on material and structure innovations. In the second phase, the team will further improve the energy and stability, and will build prototype chips. Another important part of the second phase will be statistical studies needed to facilitate integration with CMOS to realize a product.

During the International Electron Device Meeting (IEDM) exhibition we got some updates about STT-MRAM research done at IBM, Samsung and Hynix-Grandis (who are researching STT-MRAM together).

IBM is working together with TDK and has presented a new 4-kbit perpendicular STT-MRAM array using tunnel junctions. Samsung has presented an on-axis MRAM with a novel MTJ, which they say open he way towards sub-30nm scaling. Using ferromagnetic electrode and a different MTJ structure design, Samsung think that they can scale this to a sub-20nm level.