STT-MRAM - Page 16

A couple of days ago we reported that Everspin will start sampling ST-MRAM chips soon, and today we got official word from Everspin that they are now sampling the first ST-MRAM chip. The EMD3D064M is a 64Mb DDR3 device, and select customers are already evaluation samples. Everspin is currently targeting the enterprise SSD market, to complement flash memory.

Everspin is manufacturing the ST-MRAM chips on its 200mm production line in Chandler, Arizona. The company is working to establish 300 mm MRAM tools and additional fab capacity. The company expects the EMD3D064M to become available in 2013.

Imec and Tokyo Electron (TEL) have decided to extend their current collaboration to include joint R&D on STT-MRAM, which will take place within imec’s research and development program on emerging memory technologies.

TEL installed a Tactras etch tool at imec's 300mm clean room. This enables imec and TEL to jointly develop the patterning processes for high-density STT-MRAM technology. The Tactras is designed for in-situ cluster patterning of the Magnetic Tunnel Junction (MTJ) stack, which is key for advanced memory technology nodes.

Belgian's research center Imec announced today that it will collaborate with Canon Anelva on STT-MRAM research and development. This collaboration will be part of imec's R&D program on advanced emerging memory technologies and aims to explore the full technology potential of STT-MRAM including performance beyond 1ns and scalability beyond 10 nm for embedded & stand alone applications.

Canon Anelva already installed a deposition tool in imec’s state-of-the-art 300-mm clean room. Combined with imec’s advanced litho-cluster and its material engineering capabilities, imec’s industrial partners now have access to a complete 300-mm STT-MRAM-dedicated processing capability.

Update: this is now official, Everspin's EMD3D064M is the world's first ST-MRAM chip, will ship in 2013

We just got word that Everspin will soon announce their first ST-MRAM product. From what we hear, the 64-Mbit chip is already sampling and clients are already evaluation it. Everspin is targeting the enterprise SSD market. Everspin's ST-MRAM chips will feature non-volatility, low latency and increased reliability.

If this is true, this is a very exciting moment for the MRAM industry, as many believe that Spin-Torque (ST-MRAM) technology will finally enable MRAM to reach high densities, lower prices and mass market adoption.

Tohoku University plans to open a new program for international academic-industrial collaboration on integrated electronics R&D in spring 2013. Tokyo Electron Limited (TEL) announced it will participate in the STT-MRAM research program, and will also develop manufacturing equipment technology for the program.

TEL has been collaborating with the university on Spintronics memory technology since December 2011, and apparently are also developing STT-MRAM STT-MRAM production equipment technology and integration technology together.

Researchers from A*STAR have posted an interesting study about STT-RAM production process. In particular, they say that it's already known that the annealing temperature controls the change in resistance between parallel and anti-parallel magnetizations. The higher the annealing temperature, the better larger the resistance change - but if the temperature is too high it drops.

The researchers now looked at an entire cell, and found out that the annealing temperature that yielded the maximum resistance variation exceeded the temperature necessary for maximum thermal stability.

Avalanche Technology announced that it has raised $30 million from existing investors (Vulcan Capital, Sequoia Capital, Bessemer Venture Partners, Thomvest Ventures and Qualcomm Ventures) and also from a new investor, VTB capital. Avalanche hopes that this investment will enable them to bring the first products into the market.

Avalanche will produce STT-MRAM chips based on their proprietary SPMEM (Spin Programmable Memory) technology. SPMEM uses a revolutionary spin current and voltage switching technology that enables "lower write current, smaller cell size and excellent scalability". The first products will use a 65 nm process, but the company says that their technology is scalable to 10 nm or even less.

A couple of weeks ago we reported that Nanounity has signed a Sales & Marketing agreement with Mountain Scientifics (MSI) to promote the MSI QSW-Gen3 Quasi-Static Wafer tester product for STT-MRAM devices. Today Nanounity says that they have received an order for a QSW-Express STT-RAM Wafer level Prober from a leading semiconductor equipment manufacturer.

MicroSense says that they see an increase in orders for its MRAM magnetic metrology systems. MicroSense's metrology tools characterize the magnetic properties of multi-layer wafers used in the development and manufacturing of perpendicular MRAM. They offer a 300mm Polar Kerr (out-of-plane) MRAM metrology system, the KerrMapper (in-plane) tool and Vibrating Sample Magnetometers (VSM) for MRAM makers.

The company has been selling Gen-1 MRAM metrology tools since 2004. They say that now, with the recent developments in STT-MRAM, they see a number of new MRAM tool orders.

Integral Solutions International (ISI) released today a new wafer-level analyzer for STT-MRAM characterization, the WLA-3000. They say that this is the world's first commercially available and fully integrated solution to address the needs of production level testing of STT-MRAM wafers.

The WLA-3000 includes proprietary magnets, pulse generator module, probecard interfaces, and measurement electronics that were all specifically developed by ISI. ISI says they already shipped several of these testers which have now been qualified for high volume production testing of STT-MRAM devices.