STT-MRAM - Page 15

One year ago, the French National Research Agency (ANR) launched an MRAM project called MARS (MRAM based Architecture For Reliable and low power Systems). The main focus of this project is the study of MRAM technology's contribution to embedded processors architectures. MARS also aims to build new MRAM architectures and design new software models.

The MARS project already reached several milestones:

• An open-source, generic STT and TAS compact Model (Spinlib library) for electrical simulation
• Developed new Non-Volatile Flip Flop (several patents were already requested) and a new non-volatile SRAM/MRAM memory (also patented)
• A full study on reliability on the STT-MRAM comprising noise and stochastic effects
• A study on the use of MRAM on the embedded processor hierarchy (MRAM cache memory based architecture)
• New MRAM/DRAM cells was designed and successfully tested on silicon

Samsung Electronics launched a new global research outreach program aimed towards STT-MRAM innovation. The Samsung Global MRAM Innovation (SGMI) is looking for colleges, universities and research labs from all over the world to explore breakthrough and innovative STT-MRAM research.

Samsung invites submissions for novel ideas on STT-MRAM research - and the selected proposals will receive financial support from Samsung. Samsung will give around $70,000 to $150,000 for one year research (which may be extended for up to three years). They may also offer larger funds for exceptional proposals. The deadline for submission is September 28, 2013.

GlobalFoundries announced it is joining Qualcomm and Imec (and other companies) in their joint development effort to advance STT-MRAM technology. GlobalFoundries is the first IC maker to join imec's R&D program on emerging memory technologies. Imec says that they now have the complete infrastructure necessary for STT-MRAM R&D.

Imec and the other members aim to explore the potential of STT-MRAM, including performance below 1ns and scalability beyond 10nm for embedded and standalone applications.

Yole Développement released a new report on Emerging Non-Volatile Memories (which include four major technologies: MRAM, PCM, RRAM and FeRAM). They see the market increasing ten-fold in the next five years to $2 billion by 2018 (of which STT-MRAM and PCM will take the major share of $1.6 billion) - mostly due to improved scalability and chip density.

The largest market will be enterprise storage, where STT-MRAM and PCM cache memory will be adopted. PCM will also be used in mobile phones thanks to 1GB chips made available by Micron in 2012. STT-MRAM is expected to replace SRAM in SoC applications thanks to lower power consumption and better scalability. Another market for MRAM and STT-MRAM is smart card MCUs.

UCLA researcher have managed to make major improves in MRAM memory by electric voltage instead of a flowing electric current (which is used in STT-MRAM). They call the new memory MeRAM (Magnetoelectric Random Access Memory). The researchers say that MeRAM combines extraordinary low energy with very high density, high-speed reading and writing times, and non-volatility.

By using voltage to write data into MeRAM's memory, there's no need to move large numbers of electrons through wires and so the writing generates much less heat - in fact MeRAM could be 10 to 1,000 times more energy-efficient than STT-MRAM. It's also five times as dense (more bits stored in the same physical area). This should hopefully make MeRAM cheaper, too.

Toshiba has developed a prototype memory element for STT-MRAM that (according to Toshiba) achieves the world's lowest power consumption yet reported. STT-MRAM based on this element has the potential to surpass the power consumption efficiency of SRAM as cache memory.

Toshiba's improved structure is based on perpendicular magnetization and takes element miniaturization to below 30nm. Introduction of this newly designed "normally-off" memory circuit with no passes for current to leak into cuts leak current to zero in both operation and standby without any specific power supply management. The company says it improved the speed of their previous design - while reducing the power consumption by 90%.

Back in June 2010 We learned that Qualcomm is developing MRAM technologies. Now Qualcomm's QTI Advanced Memory Team posted a job opening that details a mobile STT-MRAM lead technologist - that will lead the development of next-generation mobile SOC memory subsystems that integrate Perpendicular STT-MRAM.

Last week Everspin announced their first ST-MRAM product, and today we found this nice video showing a tour of Everspin's booth at LSI AIS 2012 and explaining the company's technology and products. The explanation is given by Joseph O'hare, Everspin's director of product marketing:

Spingate announced that they invented a multi-bit Spin-RAM, which can store two bits per MTJ. It uses magnetic materials with perpendicular anisotropy and has a cell size of 4F², which is the smallest currently reported in the industry. This kind of memory can provide a density of about 160 Gbits/in² (0.257 Gbit/mm²) at 45 nm. They say their design has excellent thermal stability, and so can scale down to 10 nm.

Spingate's Spin-RAM uses the company's proprietary hybrid write mechanism based on a simultaneous application of a spin-polarized current and a bias magnetic field. The hybrid write mechanism provides the Spin RAM with a high switching speed (about 1 ns or less), low density of the spin-polarized current (about 10⁶ A/cm² or less), excellent endurance (about 10¹⁵ or above) and error rate. Spingate says that it can be smoothly arranged in a 3D architecture (without additional layers or selection transistors), and 1 Tbits/in² can be achieved at 25 nm (with only two layers of MTJ) or at 18 nm (in a 2D architecture).

Spin Transfer Technologies (STT) announced that Barry Hoberman has been appointed as CEO and Chairman of the board. Barry was Crocus Technology's chief marketing officer, and we interviewed him in January.

Back in February STT announced that they raised $36 million to accelerate the development of its patented orthogonal spin transfer magneto resistive random access memory technology (OST-MRAM) - by scaling operation, hiring new employees and purchasing equipment. Back in October 2008 we have interviewed Vincent Chun, who was then the executive in charge at STT.