Toshiba and SK Hynix co-developed a 4-Gbit STT-MRAM chip, and presented a prototype at IEDM 2016.
The prototype chip is made from eight 512-Mbit banks, and the cell area is equivalent to that of DRAM - at 9F2, which Hynix says is much smaller than conventional STT-MRAMs (50F2).
Hynix and Toshiba hopes to commercialize their STT-MRAM technology in 2-3 years.
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Posted: Dec 20,2016 by Ron Mertens
