Patents

Reports in Japan suggest that Taiwan's Powerchip Semiconductor Manufacturing (PSMC) will enter into a new MRAM R&D project, together with Japan's Power Spin. PSMC plans to start producing MRAM chips by 2029, at its 12-inch factory that it is now building in Japan.

Power Spin, that holds MRAM IP originally developed at Tohoku University, will license its IP to PSMC and will assist in the required R&D and ramp-up of production at PSMC's fab. PSMC looks to utilize the MRAM technology mainly for generative AI data center solutions.

Everspin Technologies announced that it has signed an IP cross-licensing agreement with Seagate Technology. Everspin will license specific Tunneling Magnetoresistance (TMR) patents to Seagate, while Seagate will license MRAM patents to Everspin.

Everspin says its IP portfolio is now stronger which will provide further protection to for its products and services, while Seagate will gain license to TMR IP which can be used in HDD head technology.

In November 2013, Crocus Technology filed an Inter Partes Review petition to the US PTO, claiming that Spin Transfer Technologies's US patent #6,980,469 describes a technology already used in prior art, in particular in the patent portfolio of Crocus. In April 2014, the USPTO issued a preliminary decision in favor of Crocus' petition.

Crocus now says that it has prevailed in the Inter Partes Review of the patent. Crocus petitioned to cancel all or part of the patent as Crocus’s patent portfolio includes a patent on this technology that makes advanced non-volatile memory blocks more efficient. After careful consideration, the Patent Trial and Appeal Board of the US Patent and Trademark Office issued its final written decision cancelling or finding unpatentable all but three claims of the ’469 patent.

Last month we reported that Avalanche Technology has been awarded four key "milestone" patents for its STT-MRAM technology and solid-state storage array system design. Today the company announced that it has been awarded four new STT-MRAM patents in areas of Perpendicular STT-MRAM and MRAM Integration and Manufacturing. Avalanche has over 200 filed patents that covers the full spectrum from memory cell/circuit design and manufacturing to solid-state storage system development and deployment.

The company has been awarded three key patents in the area of Perpendicular STT-MRAM:

In November 2013, Crocus Technology filed an Inter Partes Review petition to the US PTO, claiming that Spin Transfer Technologies's US patent #6,980,469 describes a technology already used in prior art, in particular in the patent portfolio of Crocus.

Crocus Technology now says that the USPTO issued a preliminary decision in favor of Crocus' petition - saying that there is a “reasonable likelihood” that Crocus will prevail with respect to its challenge. The patent in question describes a high-speed low power magnetic devices based on current induced spin-moment transfer.

In January 2013, NVE filed a patent infringement lawsuit against Everspin Technologies. A few months later, Everspin filed a patent lawsuit of their own against NVE.

Yesterday NVE announced that the two companies agreed to drop both lawsuits and will not assert the patents in those suits against each other in the future. NVE says that this agreement (which seems to be a appointment's to their shareholders) is limited to the patents in the 2012 lawsuits.

Avalanche Technology has been awarded four key "milestone" patents for its STT-MRAM technology and solid-state storage array system design. Avalanche has over 200 filed patents that covers the full spectrum from memory cell/circuit design and manufacturing to solid-state storage system development and deployment.

Avalanche (founded in 2006 and based in California, US) developed patented Spin Programmable STT-MRAM (SPMEM) memory that uses a revolutionary proprietary spin current and voltage switching technology. The company wants to license their technology for embedded applications and also build discrete standalone memory devices. In July 2012 the company raised $30 million.

Researchers from the National University of Singapore developed a new MRAM device structure technology that may prove to be easier to implement and have high reliability compared to current MRAM structures.

The researchers explain that current MRAM uses horizontal (in-plane) current-induced magnetization. This requires ultra-thin ferromagnetic structures which are challenging to implement and also suffer from low reliability. The new design uses magnetic multilayer structures as thick as 20 nanometer, providing an alternative film structure for transmission of electronic data and storage.

Crocus Technology filed an Inter Partes Review petition to the US PTO, claiming that US patent #6,980,469 describes a technology already used in prior art, in particular in the patent portfolio of Crocus. The patent in question describes a high-speed low power magnetic devices based on current induced spin-moment transfer, and is owned by New York University (although crocus says in their PR that it is owned by Spin Transfer Technologies (STT).

Crocus currently holds 154 patents, describing their Magnetic Logic unit (MLU) design and manufacturing as well as generic technologies like STT (Spin Torque Transfer).

One year ago, the French National Research Agency (ANR) launched an MRAM project called MARS (MRAM based Architecture For Reliable and low power Systems). The main focus of this project is the study of MRAM technology's contribution to embedded processors architectures. MARS also aims to build new MRAM architectures and design new software models.

The MARS project already reached several milestones:

• An open-source, generic STT and TAS compact Model (Spinlib library) for electrical simulation
• Developed new Non-Volatile Flip Flop (several patents were already requested) and a new non-volatile SRAM/MRAM memory (also patented)
• A full study on reliability on the STT-MRAM comprising noise and stochastic effects
• A study on the use of MRAM on the embedded processor hierarchy (MRAM cache memory based architecture)
• New MRAM/DRAM cells was designed and successfully tested on silicon