MRAM production - Page 8

Crocus announced that they have successfully developed their 2nd generation MRAM products, using SVTC Technologies production ready tools, metrology and infrastructure. Crocus said that they transferred the process to a production foundry.

Crocus says that their MRAM technology can be scalable to 90nm, 65nm and smaller, and offers high speed, reliability, and reduced power consumption.

Everspin announced that BMW is using their 4Mb MRAM chip (MR2A16AMYS35) in their super bike. Everspin's say that their MRAM products meet the demands of AEC-Q100 standards that are associated with a variety of automotive applications (engine control units, advanced transmission control, in-car data log and multimedia systems for in-car entertainment).

BMW is using the memory chip in their Motorrad Motorsport engine control unit (ECU) called RSM5, storing important calibration data that controls the motorcycle during a race. The MRAM chip stores adjustable engine parameters such as data related to a racing bike’s fuel injection, ignition, braking and acceleration, and is optimized before each race - with different parameters according to the river, track and race conditions.

NVE reported their financial results, and in the conference call they gave some interesting new details about their MRAM program. Daniel Baker (the CEO) says that NVE 'overcame many of the technical challenges in making MRAM'. In fact, the company is already shipped some sample prototype MRAM chips, but they don't call it 'production' yet. The samples will be for specialized niche applications - but the company sees this as a 'vehicle to develop MRAM technology'. In the future the company hopes to address large volume anti-tamper applications such as to prevent identity theft or improve the security of credit cards and smart cards.

In regards to Everspin being a licensee, here's what they say - "EverSpin is a company that's making and selling commercial MRAM, and they are spin-off of Freescale, which was a spin-off of Motorola. So, we have a long historical relationship. Motorola was an early investor in NVE, and we had research contracts and intellectual property agreements with Motorola. So, we believe that they share our vision for a very bright future for MRAM"

Everspin announced a new product, the MR25H40. It's a 4Mb MRAM with a fast, simple Serial Peripheral Interface (SPI). The MR25H40 requires no write delay, runs at clock speeds as fast as 40 MHz, and provides automatic data protection on power loss and unlimited endurance with more than 20 years data retention. This new chip is the highest density SPI MRAM (Everspin also offers 256Kb and 1Mb SPI MRAM). Samples of this chip are now available in industrial (-40°C to 85°C) temperature grades.

The MR25H40 MRAM product operates from 3.0 to 3.6 volts while offering low standby and operating currents as well as a sleep mode to further reduce system power consumption. The device is byte-organized internally, containing 4096 Kb of data. Industry-standard serial SPI command codes and timing enable easy connection to existing MCU and system designs. The MR25H40 is available in a small footprint 5mm x 6mm, 8-pin DFN package or an easily mounted 300 mil 8-pin DIP, which are both RoHS-compliant and are pin-out and footprint compatible with serial EEPROM, Flash and FeRAM products.

Crocus announced that they have successfully integrated their Thermally Assisted Switching (TAS)-based MRAM technology into TowerJazz’s 0.13-micron CMOS process. Crocus hopes to get samples manufactured in the "very near future", with mass production starting in 2H 2011. The first chips will probably offer 1-Mbit of storage. TowerJazz and Crocus have been working towards TAS-MRAM production since June 2009.

To achieve this milestone, a number of critical technological problems were solved, particularly in the areas of deep submicron lithography of magnetic tunnel junction (MTJ) stacks and the selection of materials for high device reliability. The newly developed technology adds only four masks to conventional CMOS manufacturing flows and is suitable for both standalone and embedded memory applications. The integration into TowerJazz’s copper-based 130nm CMOS logic process sets the stage for the market introduction of leading edge single chip memory products and embedded MRAM IP blocks to be used in complex Systems-On-Chip (SOC) for microcontroller, automotive and communications applications.

MagSil has been working on MRAM since 2004, but we had very little information about the company till now (except for a PR from 2009 in which they said they'll soon reach full-scale commercialization). Today they have finally revealed more information. They are developing MRAM based on Magnetic Recording (iMR) cell architecture, based on a traditional magnetic tunnel junction (MTJ) scheme.

The company hopes to start making a standalone 1Mb MRAM device (based on 130- and 90-nm processes) "pretty soon". They also have plans for a 64Mb chip.

The technology was originally developed by MIT and exclusively licensed to Magsil. They have filed several suits against companies over hard disk drive components using tunneling magnetoresistive (TMR) technology and have reached settlements with Western Digital, Seagate, SAW Magnetics and Headway Technologies. Litigation is still ongoing with Hitachi and Shenzen ExcelStor technology.

Aeroflex Colorado Springs has licensed MRAM technology from Everspin for the development of HiRel nonvolatile memory solutions for aerospace and defense applications. Aeroflex will develop 4Mb and 16Mb MRAM monolithic solutions with guaranteed total ionizing dose and single event effect hardness. Aeroflex envisions HiRel MRAM solutions being used with microprocessors, DSP engines, storage systems, instruments, and reconfigurable FPGAs that require guaranteed total ionizing dose and single event hardness.

Aeroflex’s MRAM roadmap includes a family of -55oC to +125oC, QML products offered in ceramic packages per a Standard Microcircuit Drawing (SMD). As a replacement for 3.3 volt asynchronous SRAM, Aeroflex products will be 8-bit parallel I/O solutions in densities of 4M, 16M, and 64Mbit. All products are designed to operate from a single 3.3 volt supply. With data retention after each write of 20 years and infinite read/write endurance, Aeroflex MRAM products are ideal for working memory applications that require high rates of data overwrites.

Menta SAS and LIRMM (The Montpellier Laboratory of Informatics, Robotics, and Microelectronics) has confirmed the tape out of world’s first MRAM-based FPGA. The FPGA is based on Menta's eFGPA Core programmable logic architecture and on CEA-LETI and Crocus's MRAM technology. It is manufactured in CMOS 130nm with magnetic junction in 120nm and provides capacity of 1,444 LUT4, equivalent to approximately 20K logic gates.

Pr Lionel Torres, in charge of the MRAM design project at LIRMM, says that “MRAM-based FPGA proposes better versatility with partial or dynamic re-configurability capabilities, instant on/off total or partial energy saving”.

Yesterday Crocus has announced a new CEO (Dr. Bertrand F. Cambou) and an 8 million euro investment. Last year we spoke with their previous CEO (Jean-Pierre Braun), and now Dr. Bertrand was kind enough to answer a few questions we had.

Q: The original plan was to release products towards the end of 2009. What's the new target date?
End of 2010 for sampling, mid 2011 for revenue.

Q: Can you tell us a bit more about these products?
At first it will be NV-SRAM 1Mbit. Then we will expand to a family 256Kb-4Mb. We will price it at market price.

Q: When we talked to Jean-Pierre, he estimated the applying the technology for STT-RAM (in 45-60nm) will take at least 4-5 years. What's your view on that?
In my view point the current technology has leg, and will be integrated into CMOS logic all the way to 45nm. STT-TAS will take the relay at 32nm and under within 4-5 years.

Q: Where does he see Crocus' products used in the first few years?
Beside NV-SRAM, Crocus technology should be integrated into logic for embedding memory (replacing SRAM & Flash) into MCU. There is also the opportunity to replace the fuse on SRAM based FPGA to offer re-programable FPGA.

Q: Will Crocus require another round of finance, or do you hope that you can break-even soon?
We will look at strategic corporate partners interested by Crocus technology: NRE/ advance payment on Royalties/ low dilution.....

Dr. Bertrand - thanks again for answering our questions... good luck to both you and Crocus!

Crocus announced an 8 million euro investment, and a change of CEO. The new CEO is Dr. Bertrand F. Cambou. His main task is to bring their MRAM products to the market. Crocus aims to complete the production transfer of its 130nm MRAM technology to manufacturing partner Tower Semiconductor soon.

Crocus has originally planned to start production towards the end of 2009.