Embedded MRAM - Page 5

Need for Smaller, High-speed, Ultra-high Density, Storage Devices Fostering Advances in Embedded Memories

Research and Markets has announced the addition of the Frost & Sullivan report: Advances in Embedded Memories to their offering.

In this research, Frost & Sullivan's expert analysts thoroughly examine the following technologies: embedded static random access memory (eSRAM), embedded dynamic RAM (eDRAM), embedded flash memory (eflash), magnetoresistive RAM (MRAM), ferroelectric RAM (FeRAM/FRAM), phase change memory (PCM/PRAM), carbon nanotube memory, molecular memory, polymer memory, and biomolecular memory.

Read the full story Posted: May 30,2007

NEC Develops MRAM Cell Technology Suitable for Embedding in Next Generation System LSIs

NEC Corporation today announced that it has succeeded in developing new MRAM cell technology suitable for high speed memory macro embedded in next generation system LSIs. The newly developed cell technology includes three key elements; a 2T1MTJ (two transistors and one magnetoresistive tunneling junction) cell structure to accelerate write mode cycle time, a 5T2MTJ cell structure to accelerate read mode cycle time and a write-line-inserted MTJ to reduce write current. The new cell technology realizes added-value, non-volatile MRAM macros that can be substituted for SRAM (static random access memory) macros embedded in system LSIs.

Features of the newly developed elements:
1. 200MHz random access write operation: Elimination of the upper limit of the writing current by a 2T1MTJ cell enables high speed write operation. In conventional MRAM memory cells, writing current must be within upper and lower limits (note 1). This complicates the write current source circuit and it thus cannot operate at over 100MHz.
2. 500MHz random access read operation: Intra-cell-signal amplification in a 5T2MTJ cell enables high speed read operation. Cell current signal is amplified and transformed into voltage signal in each cell. In conventional MRAM memory cells, a small reading current difference signal through the bit line with large parasitic capacitance makes sense amplifier circuits complicated. These kinds of circuits cannot operate at over 200MHz.
3. Reduction of writing current down to 1/3: A write-line-inserted MTJ structure reduces writing current to 1/3 as compared with conventional MTJ structure writing currents. This small current reduces MRAM cell size.

Read the full story Posted: Jul 14,2006

Embedded non-volatile storage promises memory marvels

Interesting article from Engineer Live, about MRAM, OUM and FRAM -
MRAM is the highest profile at the moment, with a 4Mbit prototype shown in December (2003) based around a magnetic tunnel junction (MTJ) where magnetic material stores the data bit.
"We are very excited about this," said Saied Tehrani, director of MPEM technology at Motorola Semiconductor division. "It really brings two parts of the industry together - semiconductor and magnetics. We have taken the thin film technology and integrated that with the silicon transistor technology and used the magnetic polarisation to store the data and the silicon transistor for reading and writing the information."
The 4Mbit part is built in 0.18µm technology but for commercial products Motorola is looking at jumping a process generation and going straight to the current leading edge 90nm. This is being developed at a plant in Crolles, France, in a joint development with Franco-Italian chip maker ST Microelectronics and Dutch electronics giant Philips.
This would allow 64Mbits or even 128Mbit stand alone devices to be built, but that is not the aim.
So Motorola is planning to embed MRAM into devices alongside other functions. Tehrani would not comment on what these devices would be, except to say that they would be out on the market in 2005 and Motorola would announce the roadmap later this year. "Microcontrollers are a definite possibility for this technology," he said.

Read the full story Posted: Jun 04,2005