Everspin - Page 11

Last updated on Sun 15/09/2024 - 12:32

Everspin raised $29 million from Global Foundries, Western Digital and others

Everspin Technologies announced that it closed a $29 million funding round, led by Global Foundries and Western Digital Capital. Existing investors (New Venture Partners, Lux Capital, Sigma Partners, Epic Ventures, and Draper Fisher Jurvetson) also joined in the round.

In October 2014 Everspin entered into a partnership with GlobalFoundries to build fully processed 300mm wafers with Everspin's ST-MRAM technology. In October it was announced that GF acquired a stake in Everspin (this is probably before this recent investment) and also acquired ST-MRAM processing equipment (40-nm).

Read the full story Posted: Jan 26,2015

Everspin signs production agreement with GlobalFoundries, sold over 40 million MRAM chips

Everspin Technologies entered into a partnership with GlobalFoundries to build fully processed 300mm wafers with Everspin's ST-MRAM technology, starting with GF's 28-nm and 40-nm low-power CMOS platforms. As part of the agreement, GlobalFoundries invested an undisclosed amount in Everspin, and they already acquired ST-MRAM processing equipment (40-nm).

Everspin hopes that the new agreement will help drive ST-MRAM adoption and will offer higher volume production at lower cost. The company reports that they shipped over 40 million MRAM chips - which represents very fast growth as in August 2013 they reported selling 10 million MRAM chips so they sold almost 30 million chips in just over a year (it took them over 4 years to sell the first 10 million).

Read the full story Posted: Oct 29,2014

Everspin: 256Mb ST-MRAM chips coming soon

Here's an interesting video interview with Joe O'Hare, Everspin's Director of Product Marketing. Joe explains the company's MRAM (and ST-MRAM) tech and business, especially how it relates to enterprise SSD, which seems to be the focus of MRAM applications at the moment:

During the interview, Joe updates that everspin is now designing a 256Mb chip, and this will be the next product the company will introduce. Currently their highest-density chip is the 64Mb ST-MRAM chip (announced in 2012, but only ramped-up recently).

Read the full story Posted: Aug 24,2014

Everspin ramps up ST-MRAM chips, unveils three new customers

Everspin announced the world's first STT-MRAM chip back in 2012, and they started offering it to customers in 2013. So far we only heard of a single product that actually uses those chips: Buffalo Memory's S6C industrial SATA III SSD. Today Everspin announced it is ramping up production, and the company disclosed several new customer and ecosystem relationships.

Everspin is collaborating with FPGA leader Altera, and is showcasing three new customers: SMART Modular Technologies, Mobiveil and Mangstor. SMART Modular is demonstrating a PCIe-based, high speed, and persistent FPGA-based memory solution using Everspin's STT-MRAM chips. SMART are using Evespin's EMD3D064M 64Mb DDR3 ST-MRAM chips. Mangstor unveiled the MX6000 family of Intelligent Storage Devices that use Everspin's ST-MRAM chips.

Read the full story Posted: Aug 07,2014

NVE and Everspin agree to drop their lawsuits against each other

In January 2013, NVE filed a patent infringement lawsuit against Everspin Technologies. A few months later, Everspin filed a patent lawsuit of their own against NVE.

Yesterday NVE announced that the two companies agreed to drop both lawsuits and will not assert the patents in those suits against each other in the future. NVE says that this agreement (which seems to be a appointment's to their shareholders) is limited to the patents in the 2012 lawsuits.

Read the full story Posted: Apr 08,2014

Buffalo Memory launched the first product with STT-MRAM - a new industrial SATA III SSD

Buffalo Memory launched a new industrial SATA III SSD (the S6C series) that uses Everspin's STT-MRAM as cache memory. As far as we know, this is the first product on the market to use STT-MRAM chips. Buffalo says that by using STT-MRAM cache, they were able to improve performance (access time) and power consumption, and also feature better tolerance to sudden power off.

Everspin ST-MRAM chips

Buffalo's SSD use Everspin's EMD3D064M 64Mb DDR3 ST-MRAM chips. These feature full DDR3 speed coupled with non-volatility. The EMD3D064M chip is functionally compatible with the industry standard JEDEC specification for the DDR3 interface, providing designers the ability to quickly adopt ST-MRAM in storage and embedded systems.

Read the full story Posted: Nov 19,2013

Everspin raised $15 million, sold over 10 million MRAM chips

Everspin Technologies announced today that they closed a Series B financing, raising $15 million from venture capital firms including New Venture Partners, Sigma Partners, Lux Capital, Draper Fisher Jurvetson, and Epic Ventures. The money will be used to launch their first ST-MRAM products (hopefully by 2013).

Everspin ST-MRAM chips

Everspin also announced that they sold over 10 million MRAM chips. In the end of 2011 the company said they sold 4 million chips. They actually hoped to sell 5 million chips in 2012 which means that the current rate is actually lower than expected (if they only now reached 10 million chips) - but still this is an impressive milestone for MRAM technology (Everspin is still the only company shipping commercial MRAM chips).

Read the full story Posted: Aug 18,2013

Everspin announces a new MRAM chip with Quad SPI interface

Everspin announced a new MRAM chip, the 1-Megabit serial MR10Q010 that features a Quad-SPI interface. Quad SPI, which has four serial I/O paths, is an evolutionary upgrade from SPI (that has a single I/O path). Everspin expects the new part, which has a 104 MHz clock speed with 52 MBps read/write bandwidth, to be used in applications that require high frequency, high-performance writes of most critical data.

The MR10Q010 MRAM offers read/write bandwidth comparable to parallel I/O MRAM but with a significant savings in pins and allows execute in place (XIP) operation. The chip includes a complete command set for Quad SPI operations including fast reads and writes in which address and data are input on all four I/Os to reduce clock cycles. The part comes in a cost-effective, low pin count 16-pin SOIC package – a savings of 20 pins over parallel interfaces – that supports low voltage levels with separate VDDQ for I/O. It is compatible with future high-density Quad SPI packages that Everspin is planning to introduce.

Read the full story Posted: Feb 26,2013