October 2017

Spin Transfer Technologies (STT) announced that it has signed an agreement with Tokyo Electron (TEL) to collaborate on the development of next-generation SRAM and DRAM-class STT-MRAM devices.

Spin Transfer Technologies says that the combination of its STT-MRAM technology with TEL’s advanced PVD MRAM deposition tool will allow the companies to quickly develop processes for the highest density and endurance devices.

The EU launched a new project called GREAT H2020 moderated by the CEA-Spintec laboratory that plans to co-integrate multiple functions like sensors, RF receivers and logic/memory together within CMOS thanks to a single baseline technology in the same System on Chip.

One of the project’s final objectives is to develop a system-level simulation and design of a representative IoT platform, integrating this technology. To achieve it, a unique exploration flow is proposed: MAGPIE. MAGPIE stands for Manycore Architecture enerGy and Performance evaluation Environment and has been jointly developed and funded through GREAT and the CONTINUUM ANR French project.

Spin Transfer Technologies announced that it has raised $22.8 million via a convertible bridge facility. STT says that this will help the company get ready to complete its Series B funding round, targeting strategic investors and planned to conclude by end of Q1 2018.

In January 2017 STT announced that it has started to deliver fully functional ST-MRAM samples to customers in North America and Asia. The sample devices are based on the company's Orthogonal Spin Transfer Magneto-Resistive Random Access Memory technology (OST-MRAM), and use 80nm perpendicular magnetic tunnel junctions (MTJs)., the latest generation of MRAM technology.