According to a report from Japan, TDK Corp is going to present a prototype 8-Mbit STT-MRAM device today at Ceatec Japan 2014. The MRAM was produced on a 8" silicon substrate. Hopefully TDK will give more details on this achievement later today.
The report further says that TDK aims to commercialize STT-MRAM chips in 3-5 years.
Here's an interesting video interview with Joe O'Hare, Everspin's Director of Product Marketing. Joe explains the company's MRAM (and ST-MRAM) tech and business, especially how it relates to enterprise SSD, which seems to be the focus of MRAM applications at the moment:
During the interview, Joe updates that everspin is now designing a 256Mb chip, and this will be the next product the company will introduce. Currently their highest-density chip is the 64Mb ST-MRAM chip (announced in 2012, but only ramped-up recently).
According to Nikkei, over 20 Japanese and US companies have teamed up to develop MRAM technologies, in particular a new mass production method. Participants in this ambitious project include Tokyo Electron (who's merging with Applied Materials), Renasas, Hitachi and Shin-Etsu Chemical from Japan and Micron Technology from the US.
Japan's Tohoku University, a leader in Spintronics and MRAM research, will also join the project. The companies will finance several dozens researchers at the University. They plan to start development in February 2014, and continue to seek more companies from the US and Europe to join. The aim is to complete materials and processes development by 2017 and start mass production by 2018.
Crocus Nanoelectronics (CNE), Crocus and Rusnano's $300 million JV announced that they launched the first production line at their MLU (TAS-MRAM based) production line in Technopolis, Moscow. This line will produce MRAM using 90-nm process technology (on both 200 mm and 300 mm wafers). By the end of 2014, CNE will be able to produce 2,000 wafers per month.
MLU is a "disruptive CMOS-based rugged magnetic technology" that Crocus is co-developing with IBM. MLU offers important advantages in high speed, security, and robust performance at lower cost compared to other technologies. MLU can be used in smart cards, network commutators, biometric authenticating devices, near field communications, and secure memory.
Yesterday we reported that Crocus Technology raised â¬34 million (about $45 million) in their Series D round of funding. Crocus said that part of that money will be used to ramp up its manufacturing at Tower Semiconductors (in Israel), and today they reported about a major breakthrough in that technology development, which they will bring to market by Q4 2013.
Crocus, together with TowerJazz now offers SRAM-performance with non-volatile MRAM. The MRAM solution has demonstrated best-in-class performance and more than two billion cycles of program/erase were demonstrated on a 4M bit NVM product. The first market that the two companies will address is Battery Backed SRAM (BB-SRAM). The MRAM technology offers fast access times, low power and unlimited write cycles - without the need for cost, recharging and long-term disposal of a Lithium battery.
Crocus Technology signed a license and joint-promotion agreement with TowerJazz, for the use of Crocus' Magnetic Logic Unit (MLU) process technology. TowerJazz customers will be able to use Crocus' technology in embedded System-On-Chip (SoC) applications. First products based on MLU are expected on the market before the end of 2013 as some customers are already in the process of adopting the technology.
Crocus's MLU blocks are used in magnetic sensors and secure embedded memories. The memory is fast (like DRAM) and non volatile. It also includes unique security options. Crocus actually plans to produce (at TowerJazz's Migdal Haemek manufacturing facility in Israel) their own magnetic sensor and non-volatile memory products.
Everspin announced a new MRAM chip, the 1-Megabit serial MR10Q010 that features a Quad-SPI interface. Quad SPI, which has four serial I/O paths, is an evolutionary upgrade from SPI (that has a single I/O path). Everspin expects the new part, which has a 104 MHz clock speed with 52 MBps read/write bandwidth, to be used in applications that require high frequency, high-performance writes of most critical data.
The MR10Q010 MRAM offers read/write bandwidth comparable to parallel I/O MRAM but with a significant savings in pins and allows execute in place (XIP) operation. The chip includes a complete command set for Quad SPI operations including fast reads and writes in which address and data are input on all four I/Os to reduce clock cycles. The part comes in a cost-effective, low pin count 16-pin SOIC package â a savings of 20 pins over parallel interfaces â that supports low voltage levels with separate VDDQ for I/O. It is compatible with future high-density Quad SPI packages that Everspin is planning to introduce.
A couple of days ago we reported that Everspin will start sampling ST-MRAM chips soon, and today we got official word from Everspin that they are now sampling the first ST-MRAM chip. The EMD3D064M is a 64Mb DDR3 device, and select customers are already evaluation samples. Everspin is currently targeting the enterprise SSD market, to complement flash memory.
Everspin is manufacturing the ST-MRAM chips on its 200mm production line in Chandler, Arizona. The company is working to establish 300 mm MRAM tools and additional fab capacity. The company expects the EMD3D064M to become available in 2013.
Update: this is now official, Everspin's EMD3D064M is the world's first ST-MRAM chip, will ship in 2013
We just got word that Everspin will soon announce their first ST-MRAM product. From what we hear, the 64-Mbit chip is already sampling and clients are already evaluation it. Everspin is targeting the enterprise SSD market. Everspin's ST-MRAM chips will feature non-volatility, low latency and increased reliability.
If this is true, this is a very exciting moment for the MRAM industry, as many believe that Spin-Torque (ST-MRAM) technology will finally enable MRAM to reach high densities, lower prices and mass market adoption.
Avalanche Technology announced that it has raised $30 million from existing investors (Vulcan Capital, Sequoia Capital, Bessemer Venture Partners, Thomvest Ventures and Qualcomm Ventures) and also from a new investor, VTB capital. Avalanche hopes that this investment will enable them to bring the first products into the market.
Avalanche will produce STT-MRAM chips based on their proprietary SPMEM (Spin Programmable Memory) technology. SPMEM uses a revolutionary spin current and voltage switching technology that enables "lower write current, smaller cell size and excellent scalability". The first products will use a 65 nm process, but the company says that their technology is scalable to 10 nm or even less.
